1/8 february 2003 STW26NM50 n-channel 500v - 0.10 w -26ato-247 zener-protected mdmesh?power mosfet typical r ds (on) = 0.10 w high dv/dt and avalanche capabilities improved esd capability low input capacitance and gate charge low gate input resistance description the mdmesh? is a new revolutionary mosfet technology that associates the multiple drain pro- cess with the companys powermesh? horizontal layout. the resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. the adoption of the companys proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competitions products. applications the mdmesh? family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies. ordering information type v dss r ds(on) i d STW26NM50 500 v < 0.120 w 30 a sales type marking package packaging STW26NM50 w26nm50 to-247 tube to-247 internal schematic diagram
STW26NM50 2/8 absolute maximum ratings ( ) pulse width limited by safe operating area (1) i sd 26a, di/dt 200a/s, v dd v (br)dss ,t j t jmax. thermal data avalanche characteristics gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the devices esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the devices integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter value unit v ds drain-source voltage (v gs =0) 500 v v dgr drain-gate voltage (r gs =20k w ) 500 v v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25c 30 a i d drain current (continuous) at t c = 100c 18.9 a i dm ( ) drain current (pulsed) 120 a p tot total dissipation at t c = 25c 313 w derating factor 2.5 w/c v esd(g-s) gate source esd(hbm-c=100pf, r=1.5k w) 6000 v dv/dt (1) peak diode recovery voltage slope 15 v/ns t j t stg operating junction temperature storage temperature -55 to 150 c rthj-case thermal resistance junction-case max 0.4 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 13 a e as single pulse avalanche energy (starting t j = 25 c, i d =i ar ,v dd =50v) 740 mj symbol parameter test conditions min. typ. max. unit bv gso gate-source breakdown voltage igss= 1ma (open drain) 30 v
3/8 STW26NM50 electrical characteristics (t case =25c unless otherwise specified) on/off dynamic switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. 3. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss . symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 500 v i dss zero gate voltage drain current (v gs =0) v ds = max rating v ds = max rating, t c = 125 c 10 100 a a i gss gate-body leakage current (v ds =0) v gs = 20v 10 a v gs(th) gate threshold voltage v ds =v gs ,i d = 250a 345v r ds(on) static drain-source on resistance v gs =10v,i d = 13 a 0.1 0.12 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds =15v , i d =13a 20 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds =25v,f=1mhz,v gs = 0 3000 700 50 pf pf pf c oss eq. (3) equivalent output capacitance v gs =0v,v ds = 0v to 400v 300 pf symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd =250v,i d =13a r g = 4.7 w v gs =10v (resistive load see, figure 3) 28 25 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =400v,i d =26a, v gs =10v 76 20 36 106 nc nc nc symbol parameter test conditions min. typ. max. unit t r(voff) t f t c off-voltage rise time fall time cross-over time v dd = 400v, i d =26a, r g =4.7 w, v gs = 10v (inductive load see, figure 5) 13 19 36 ns ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm (2) source-drain current source-drain current (pulsed) 26 104 a a v sd (1) forward on voltage i sd =26a,v gs =0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 26 a, di/dt = 100a/s v dd =100v,t j =25c (see test circuit, figure 5) 400 5.5 27.8 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 26 a, di/dt = 100a/s v dd =100v,t j =150c (see test circuit, figure 5) 492 7 28.8 ns c a
STW26NM50 4/8 safe operating area for to-247 thermal impedance for to-247 output characteristics transfer characteristics transconductance static drain-source on resistance
5/8 STW26NM50 capacitance variations gate charge vs gate-source voltage normalized on resistance vs temperature normalized gate threshold voltage vs temp. source-drain diode forward characteristics
STW26NM50 6/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/8 STW26NM50 dim. mm. inch min. typ max. min. typ. max. a 4.85 5.15 0.19 0.20 d 2.20 2.60 0.08 0.10 e 0.40 0.80 0.015 0.03 f 1 1.40 0.04 0.05 f1 3 0.11 f2 2 0.07 f3 2 2.40 0.07 0.09 f4 3 3.40 0.11 0.13 g 10.90 0.43 h 15.45 15.75 0.60 0.62 l 19.85 20.15 0.78 0.79 l1 3.70 4.30 0.14 0.17 l2 18.50 0.72 l3 14.20 14.80 0.56 0.58 l4 34.60 1.36 l5 5.50 0.21 m 2 3 0.07 0.11 v 5o 5o v2 60o 60o dia 3.55 3.65 0.14 0.143 to-247 mechanical data
STW26NM50 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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